1. Field of the Invention
The present invention relates to a multichip module for mounting a plurality of semiconductor chips and a testing method thereof.
2. Description of the Related Art
The multifunction of an electronic apparatus has been improved and a system constituted by interconnecting a plurality of processors has been used commonly. For a method of mounting such a system, attention has been paid to a multichip module for mounting a plurality of semiconductor chips such as processors on one package as compact mounting.
In such a multichip module, a method of executing a test for the mounted semiconductor chips is a technical problem. Conventionally, a circuit for easily testing a semiconductor chip mounted on the multichip module has been described in the OPI publication JP-A-5-13662.
FIG. 7 is a block diagram showing the structure of the conventional multichip module testing circuit. In FIG. 7, semiconductor chips 702 and 703 such as processors are mounted on a multichip module 701, and the output terminal of the semiconductor chip 702 and the input terminal of the semiconductor chip 703 are connected to each other through a switching chip 704.
The switching chip 704 serves to select the output terminal of the semiconductor chip 702 or an external terminal 705 so as to be connected to the input terminal of the semiconductor chip 703, thereby independently testing the semiconductor chips 702 and 703 in a package.
In this method, however, a switching chip is inserted. For this reason, there is a problem in that the design man-hour of the multichip module is increased and the area of the multichip module is increased, and furthermore, the switching chip is hard to insert in case of a lamination type.
In the case in which the switching chip is not inserted, moreover, there is a problem in that it is necessary to avoid a bus collision in consideration of the state of the semiconductor chip to be mounted in relation to the external terminal to be shared and a design is thereby carried out with difficulty in a DC test, a burn-in test, a scan test and a function test in the test design of the multichip module.
Furthermore, there are a plurality of combinations of the semiconductor chips to be mounted on the multichip module. For this reason, there is a problem in that it is also hard to carry out a design change and an addition at each time.